SINGLE-BOARD SIMD PROCESSORS USING GATE-ARRAY LSIS FOR PARALLEL-PROCESSING

We have developed an SIMD processor on a double-height VME board. We a chieved a good balance between cost and performance by combining four identical gate-array LSIs in the processor array with a 16-bit digital signal processor (DSP), standard dynamic random-access memories (DRAM s) and other peripherals. The gate-array LSIs have 168-bit processing elements (PEs), each containing a one-bit processing block and a seria l multiplier. This PE structure offers high-level bit processing capab ility and peak performance of 512 million operations per second (MOPS) for 8-bit multiply and accumulate operations. Effective performance o f more than 300 MOPS for 8-bit array data processing is achieved by us ing an LSI structure tuned to the DRAM access rate, although the proce ssing speed is reduced by the DRAM access bottleneck. The LSIs also ha ve two unique additional hardware structures that speed up various arr ay data processes. One is an inter-PE routing register array for suppo rting a transmission, rotation and memory access path. The other is a tree-structure network for propagating operations among PEs. With thes e cost-effective structures, the SIMD processor is expected to be wide ly used for two-dimensional data processing, such as image processing and pattern recognition.