GAAS-MESFET CIRCUIT STRUCTURES BASED ON VIRTUAL GROUND CONCEPT FOR HIGH-PERFORMANCE ASICS

Two types of circuit architecture for GaAs LSI are described. The firs t circuit is named Stacked DCFL which has supply voltage compatibility with Si CMOS/BiCMOS and ECL operating on 3 V or 3.3 V. A divide by 12 8/129 prescaler IC has been developed to confirm the Stacked DCFL circ uit operation. The second circuit is named SVFL which operates on sing le supply voltage by using Schottky FET characteristics in spite of no rmally-on FET logic. Both circuit architectures are based on the virtu al ground concept. The transition time of 45 psec was obtained by the SVFL ring oscillator circuit fabricated with 1 mu m gate length FET pr ocess, and the transition time of DCFL using the same process was from 80 psec to 100 psec. Stacked DCFL and SVFL are candidates for an inte rnal gate and an input/output interface circuit for GaAs ASIC, respect ively.