A new approach to fault analysis is presented. We consider multiple st
uck-at-0/1 faults at the gate level. First, a fault collapsing phase i
s applied to the network, so that equivalent faults are eliminated. Du
ring the analysis we consider frontier faults where there is at least
a normal path from each faulty line to a primary output. It is shown t
hat the set of frontier faults is equivalent to the set of multiple fa
ults. Given an input vector, we evaluate the fault-free circuit and th
en propagate fault effects. Assuming that fault-free response is obser
ved, a fault-dropping procedure is then applied to eliminate faulty co
nditions on lines, that are either absent or may be hidden by other fa
ulty conditions. This method is applied to some benchmark circuits and
achieves a high degree of efficiency.