A queueing model for performance evaluation of cluster-based multiproc
essors is proposed in this correspondence. Most system components are
modeled as M/D/1/L queues to capture deterministic service time and fi
nite buffer behavior. Various subsystems are analyzed independently an
d then integrated for the system level analysis. Average delay, throug
hput, and processor utilization are the performance parameters studied
in this analysis. The analytical results are first validated via simu
lation. Next, several design alternatives are discussed using the mode
l. These include the effect of buffer length and identification or bot
tleneck centers for various design configurations.