AN INVESTIGATION OF BICMOS ESD PROTECTION CIRCUIT ELEMENTS AND APPLICATIONS IN SUBMICRON TECHNOLOGIES

The characteristics of individual protection circuit elements, the npn and the NMOS transistors, in a 0.8 mum BiCMOS technology have been ev aluated, and their use in ESD protection circuits have been discussed in some detail. Both the output and input protection circuits have bee n developed using npn transistors as the primary protection elements. The design requirements and limitations of these circuits are analyzed . ESD thresholds of > 4 kV have been obtained for both input and outpu t buffers in this technology.