A NOVEL LOCAL OXIDATION OF SILICON (LOCOS)-TYPE ISOLATION TECHNOLOGY FREE OF THE FIELD OXIDE THINNING EFFECT

A novel LOCal Oxidation of Silicon (LOCOS)-type isolation technology f ree of the field oxide thinning effect, named POlysilicon (poly-Si) Sp acer LOCOS (POS-LOCOS), has been developed. After the first field oxid ation, poly-Si is deposited and etched anisotropically. Then, at the n arrow field region, substantial amount of poly-Si remains after etchin g, while only spacers are formed at the ends of the field region for t he wide region, and then the second oxidation is performed by oxidizin g poly-Si. POS-LOCOS eliminates the field oxide thinning effect. Devic es with POS-LOCOS show less variation in the isolation size, lower per ipheral junction leakage current, and higher field transistor threshol d voltages at narrow isolation region compared to the conventional LOC OS isolation. Almost the same N+/N+ punchthrough characteristics are o btained with POS-LOCOS and conventional LOCOS, and transistors with PO S-LOCOS show low leakage current and normal drain current (I-d)-gate v oltage (V-g) characteristic. It is expected that POS-LOCOS will help e xtend the lifetime of the LOCOS-type isolation to the next generation of the integrated circuit (IC) technology.