NUMERICAL-ANALYSIS OF TUNNELING CURRENT DUE TO ELECTRIC-FIELD CONCENTRATION AT GATE EDGE OF POLYSILICON SIO2/SILICON STRUCTURES/

Tunneling current enhancement due to electric field concentration at a gate edge is investigated by numerical calculation. The detailed curr ent distribution and change of current-voltage (I-V) characteristics a re calculated for several gate geometries differing in curvature radiu s. It is shown that the current density of an MOS structure with an ox ide thickness of 12 nm varies by 3 orders of magnitude when the curvat ure radius at the gate edge changes from 30 nm to 2 nm. A very narrow region of 8 nm at the curvature area is responsible for 80% of the tot al current between the gate and n(+) region. The calculated change in I-V characteristics is consistent with the experimentally measured I-V curve of a polysilicon gate/SiO2/n(+)-silicon structure.