T. Enoki et al., 0.05-MU-M-GATE INALAS INGAAS HIGH-ELECTRON-MOBILITY TRANSISTOR AND REDUCTION OF ITS SHORT-CHANNEL EFFECTS/, JPN J A P 1, 33(1B), 1994, pp. 798-803
In this paper, we discusse the advantages of thinning the channel on s
hort-channel effects for lattice-matched InAlAs/InGaAs high electron m
obility transistors (HEMTs) with sub-0.1-mu m-long gates with regard t
o the performance of a 0.05-mu m-gate device. To fabricate a sub-0.1-m
u m gate, the opening shape of the gate-footprint is controlled by usi
ng a bilayer dielectric film system and RIE side etching. The device s
hows a current gain cutoff frequency of 300 GHz and g(m)/g(d) ratio of
15. Thinning the channel and the barrier down to 100 Angstrom improve
s carrier confinement and subthreshold characteristics and is indispen
sable for reducing the short-channel effects in the sub-0.1-mu m-gate-
length region.