A 300-MHZ 16-B BICMOS VIDEO SIGNAL PROCESSOR

A 300-MHz 16-b full-programmable parallel-pipelined video signal proce ssor ULSI has been developed. With multifunctional arithmetic units to achieve parallel vector processing, and with a phase-locked-loop (PLL ) type clock generator to help attain the 300-MHz internal operating s peed, this ULSI is able to attain, with only one chip, 30-frame-per-se cond full-CIF video data coding based on CCITT H.261. Two different ty pes of pass-transistor BinMOS circuits have been developed to help ach ieve an access time of 3 ns for a 146-kb SRAM and for data buses. Fabr icated with a 0.5-m BiCMOS and triple-layer metallization process tech nology, the video signal processor ULSI contains 1.27-million transist ors in a 16.5 x 17.0-mm2 die area.