ANALYSIS OF LATCHUP AND PARASITIC EFFECTS IN MERGED BICMOS STRUCTURES

Authors
ROFAIL SS ELMASRY MI
Citation
Ss. Rofail et Mi. Elmasry, ANALYSIS OF LATCHUP AND PARASITIC EFFECTS IN MERGED BICMOS STRUCTURES, IEEE journal of solid-state circuits, 28(12), 1993, pp. 1389-1394
Citations number
7
Categorie Soggetti
Engineering, Eletrical & Electronic
Journal title
IEEE journal of solid-state circuits → ACNP
ISSN journal
00189200
Volume
28
Issue
12
Year of publication
1993
Pages
1389 - 1394
Database
ISI
SICI code
0018-9200(1993)28:12<1389:AOLAPE>2.0.ZU;2-#
Abstract
Latchup and performance degradation due to the parasitic elements in m erged BiCMOS structures are studied. Circuit simulations using HSPICE and analytical characterization are used to describe the parasitic com ponents and model their effects, on the output voltage switching chara cteristics and delay time. A latchup factor is defined to relate the d egree of performance degradation to the device and kev circuit paramet ers.