LOW-TEMPERATURE INP SI TECHNOLOGY - FROM SI SUBSTRATE PREPARATION TO EPITAXIAL-GROWTH/

InP layers have been grown on Si (001) substrates by using a low tempe rature process, both for the Si surface preparation (400-degrees-C < T (Si) < 550-degrees-C) and for the growth process itself (T(g) < 350-de grees-C) using solid source atomic layer molecular beam epitaxy. Strai n-free InP on Si layers, with an etch pit density of approximately 1-2 x 10(7) cm-2, showing an excellent morphology and good optical qualit y have been obtained using a buffer layer involving strain layer super lattices (SLS) of elastically dissimilar materials. This result implie s an actual advancement towards monolithic integration of III-V device s to conventional CMOS-Si circuits.