SUPPLY CURRENT TEST OF ANALOG AND MIXED-SIGNAL CIRCUITS

Supply current test is well established for digital CMOS circuits and the advantages of improved observability and reliability indication ha ve prompted its use for analogue and mixed signal circuits. A short re view of the literature on this subject is given. Fault simulation is u sed for the investigation of dynamic supply current test of a PLL, con firming existing results from smaller circuits that a combination of s upply current and output voltage monitoring leads to higher fault cove rage. In the paper, fault coverage is further improved, using crosscor relation of the supply current and output signals, and the potential f or BIST implementation of this technique is demonstrated using low res olution polarised crosscorrelation. Fault simulation is also performed on an analogue multiplier to investigate the effect of process parame ter deviations on the supply current. The fault coverage is found to b e improved by removing the DC component of the signal. Encouraging res ults are obtained from the application of supply current test techniqu es to a commercial mixed signal ASIC currently beyond the capabilities of analogue fault simulation, indicating that efforts at improving fa ult simulation in this area are worthwhile. The requirements for fault modelling and simulation to support supply current test are discussed and some initial results of accelerating this process using macromode lling are presented.