GIGAHERTZ MUX-DEMUX CHIP WITH HF BIST

Citation
L. Hellberg et al., GIGAHERTZ MUX-DEMUX CHIP WITH HF BIST, Analog integrated circuits and signal processing, 12(1), 1997, pp. 29-48
Citations number
16
Categorie Soggetti
Computer Sciences","Engineering, Eletrical & Electronic","Computer Science Hardware & Architecture
ISSN journal
09251030
Volume
12
Issue
1
Year of publication
1997
Pages
29 - 48
Database
ISI
SICI code
0925-1030(1997)12:1<29:GMCWHB>2.0.ZU;2-O
Abstract
Full functional test at speed, in-situ is an ideal choice for use for detection of errors in circuit behaviour for high speed broadband comm unication circuits and to avoid test set-up disturbances on high frequ ency signals. This article presents a novel technique to solve the hig h frequency test of Gbit/s data rate Time-Division Multiplexer/Demulti plexer circuits. This in-situ test technique is based on conventional pseudo-random sequence generation and signature analysis. By linear fe edback interconnect and reusable architecture the multiplexer/demultip lexer circuits can operate as generator/analyser with minimal degenera tion of bit shift rate. Circuit simulation showed that the system oper ates correctly with a clock frequency up to 3 GHz in a silicon bipolar technology with a current gain cut-off frequency f(T) = 15 GHz.