Full functional test at speed, in-situ is an ideal choice for use for
detection of errors in circuit behaviour for high speed broadband comm
unication circuits and to avoid test set-up disturbances on high frequ
ency signals. This article presents a novel technique to solve the hig
h frequency test of Gbit/s data rate Time-Division Multiplexer/Demulti
plexer circuits. This in-situ test technique is based on conventional
pseudo-random sequence generation and signature analysis. By linear fe
edback interconnect and reusable architecture the multiplexer/demultip
lexer circuits can operate as generator/analyser with minimal degenera
tion of bit shift rate. Circuit simulation showed that the system oper
ates correctly with a clock frequency up to 3 GHz in a silicon bipolar
technology with a current gain cut-off frequency f(T) = 15 GHz.