DEUTERIUM POST-METAL ANNEALING OF MOSFETS FOR IMPROVED HOT-CARRIER RELIABILITY

Citation
Ic. Kizilyalli et al., DEUTERIUM POST-METAL ANNEALING OF MOSFETS FOR IMPROVED HOT-CARRIER RELIABILITY, IEEE electron device letters, 18(3), 1997, pp. 81-83
Citations number
14
Categorie Soggetti
Engineering, Eletrical & Electronic
ISSN journal
07413106
Volume
18
Issue
3
Year of publication
1997
Pages
81 - 83
Database
ISI
SICI code
0741-3106(1997)18:3<81:DPAOMF>2.0.ZU;2-A
Abstract
Low-temperature post-metallization anneals in hydrogen ambients are cr itical to CMOS fabrication technologies in reducing Si/SiO2 interface trap charge densities by hydrogen passivation. In this letter we show that the hot carrier reliability (lifetime) of NMOS transistors can be increased by an order of magnitude when wafers are annealed in a deut erium ambient. This phenomenon can be understood as a kinetic isotope effect. The chemical reaction rates involving the heavier isotopes are reduced, and consequently, under hot electron stress, bonds to deuter ium are more difficult to break than bonds to protium (H). However, th e static chemical bonding (i.e., binding energies and excited states) is evidently the same for both hydrogen and deuterium. We measure iden tical transistor function after hydrogen and deuterium treatment befor e hot electron dynamics and resultant damage. Therefore, deuterium and hydrogen post-metal anneal processes are compatible with each other i n semiconductor manufacturing. SIMS analysis proves that at typical an neal temperatures (400-450 degrees C), deuterium diffuses rapidly thro ugh the interlevel oxides and accumulates at Si/SiO2 interfaces. Trans istor speed versus reliability trade-off in CMOS device design is disc ussed in light of the findings of this study.