TOLERANCE ANALYSIS OF CASCADED SELF-ELECTRO-OPTIC-EFFECT-DEVICE ARRAYS

In constructing symmetric self-electro-optic-effect-device-based, two- dimensional information processing circuits, it is necessary to know t he nonuniformity that can be tolerated of the reflectivity responses o f the arrays of devices. It is also necessary to know the allowable no nuniformity of the passive optical components used to direct beam arra ys onto and between the active symmetric self-electro-optic-effect dev ices. A method for determining the mutual tolerances is presented with examples of the volumes of acceptable operation in the parameter spac e of the circuits. Leakage between devices is considered, which leads to acceptable regimes for those parameters that can be adjusted once t he circuit has been constructed and to narrower regimes in which high clock and cycle rates can be achieved.