The design of a parallel digital computer architecture, the shared-mem
ory optical/electronic computer (SMOEC), and its associated control al
gorithms are presented. The design is based on the shared-memory model
of computation and incorporates an optical interconnection network as
an essential element. The arthitecture consists of a novel passive op
tical shuffle-exchange network, which is detailed in another paper [Ap
pl. Opt. 33, (1994)], that interconnects electronic processing element
s with electronic memory modules and incorporates network control. Imp
roved capability of this optical-electronic multiple-instruction multi
ple-data (MIMD) architecture over fully electronic implementations ste
ms from the reduced complexity inherent in the optical interconnection
network and the resulting memory access capability. In this system th
e simultaneous development of three main design facets, architecture,
hardware, and control algorithms, is crucial in designing an efficient
high-performance system.