Design of multiple outputs CMOS combinational gates is studied. Two te
chniques for minimization of multiple output functions at the switchin
g level are introduced. These techniques are based on innovative trans
istor interconnection structures named Delta and Lambda networks. The
two techniques can be combined together to obtain further area reducti
ons. Different synthesis algorithms are discussed, from exhaustive enu
meration to branch and bound to heuristic techniques allowing to speed
up the synthesis process. Simulation results for synthesis are introd
uced to compare the different algorithms. Design examples are also pro
vided. Electrical simulations show that the dynamic behavior of such s
tructures is comparable to the traditional static or domino implementa
tions (obviously the new and traditional structures have the same stat
ic behavior).