RAPID PROTOTYPING ON THE GEORGIA TECH DIGITAL SIGNAL MULTIPROCESSOR

Signal processing supercomputers consisting of multiple programmable d igital signal processors offer impressive computational performance wh ile retaining flexibility of programming. The single most important fa ctor limiting their performance has been the lack of a sophisticated s oftware compiling and scheduling environment. Three generations of dig ital signal multiprocessors (DSMP's) have been designed at the DSP Lab oratory at Georgia Tech in the past decade. These architectural explor ations have been described in companion papers. In this paper, we deve lop and discuss the schedulers developed for the Georgia Tech DSMP (I- III), and present new techniques that combine a high level description of DSP's together with a theoretical analysis of the performance boun ds on synchronous multiprocessors to deliver a significant improvement in the efficiency of prototyping. The DSMP-C1 prototyping environment is presented in some detail, and its superior performance on digital signal processing applications relative to conventional schedulers is demonstrated.