A 300MHZ 16B 0.5-MU-M BICMOS DIGITAL SIGNAL PROCESSOR CORE LSI

A 300-MHz 16-b fixed-point digital signal processor (DSP) core LSI has been developed for video signal processing. In order to achieve high performance, the DSP core LSI employs a parallel processing architectu re, 300-MHz redundant binary arithmetic units, and a sophisticated hig h-performance electrical design. The DSP core LSI, which was fabricate d with 0.5-mum BiCMOS and triple-level-metallization technology, has a 3.9 mm x 4.6 mm area, and contains about 57K transistors. It consumes 2 W at a 300-MHz clock frequency with a 3.3-V power supply. Measured clock skew and critical path delay are less than 80 ps and 2.6 ns, res pectively.