CONFIGURABLE CMOS MULTIPLIER DIVIDER CIRCUITS FOR ANALOG VLSI

The design of five simple CMOS opamp based multipler/divider circuits is presented. Each two opamp and six MOSFET transistor circuit simulta neously achieves four-quadrant multiplication and division. Applicatio ns of the new circuits in analog signal processing and neural networks are discussed. The multiplier/divider circuits are all insensitive to MOS intrinsic parasitic capacitances. They do, however, exhibit diffe rent sensitivities to opamp finite unity-gain bandwidth. These sensiti vities may be mitigated using the configurability property of the circ uits. Finally experimental results are provided to support some of the theoretical claims.