MATCHING OF DUT INTERCONNECTION PATTERN WITH CAD LAYOUT IN CAD-LINKEDELECTRON-BEAM TEST SYSTEM

Precise matching of the SEM (secondary electron microscope) image of t he DUT (device under test) interconnection pattern with the CAD layout is required in the CAD-linked electron beam test system. We propose t he point pattern matching method that utilizes a corner pattern in the CAD layout. In the method, a corner pattern which consists of a small number of pixels is derived by taking into account the design rules o f VLSIs. By using the corner pattern as a template, the matching point s of the template are sought in both the SEM image and CAD layout. The n, the point image obtained from the SEM image of DUT is matched with that from the CAD layout. Even if the number of points obtained in the DUT pattern is different from that in the CAD layout due to the influ ence of noise present in the SEM image of the DUT pattern, the point m atching method would be successful. The method is applied to nonpassiv ated and passivated LSIs. Even for the passivated LSI where the contra st in the SEM image is mainly determined by voltage contrast, matching is successful. The computing time of the proposed method is found to be shortened by a factor of 4 to 10 compared with that in a convention al correlation coefficient method.