A PROPOSAL OF NEW MULTIPLE-VALUED MASK-ROM DESIGN

A new multiple-valued mask-ROM cell and a technique suitable for data detection are proposed. The information is programmed in each of the m emory cells as both the threshold voltage and the channel length of th e memory cell transistor, and the stored data are detected by selectin g the bias condition of both the word-line and the data-line. The datu m stored in the channel length is read-out using punch-through effect at the high drain voltage. The feasibility of this mask-ROM's is studi ed with device simulation and circuit simulation. With this design, it would be possible to get the high-density mask-ROM's, which might be faster in access speed and easier in fabrication process than the conv entional ones. Therefore, this design is expected to be one of the mos t practical multiple-valued mask-ROM's.