A 700-MHZ SWITCHED-CAPACITOR ANALOG WAVE-FORM SAMPLING CIRCUIT

Citation
Gm. Haller et Ba. Wooley, A 700-MHZ SWITCHED-CAPACITOR ANALOG WAVE-FORM SAMPLING CIRCUIT, IEEE journal of solid-state circuits, 29(4), 1994, pp. 500-508
Citations number
25
Categorie Soggetti
Engineering, Eletrical & Electronic
ISSN journal
00189200
Volume
29
Issue
4
Year of publication
1994
Pages
500 - 508
Database
ISI
SICI code
0018-9200(1994)29:4<500:A7SAWS>2.0.ZU;2-T
Abstract
Analog switched-capacitor memory circuits are suitable for use in a wi de range of applications where analog waveforms must be captured or de layed, such as the recording of pulse echo events and pulse shapes. An alog sampling systems based on switched-capacitor techniques offer per formance superior to that of flash A/D converters and charge-coupled d evices with respect to cost, density, dynamic range, sampling speed, a nd power consumption. This paper proposes an architecture with which s ampling frequencies of several hundred megahertz can be achieved using conventional CMOS technology. Issues concerning the design and implem entation of an analog memory circuit based on the proposed architectur e are presented. An experimental two-channel memory with 32 sampling c ells in each channel has been integrated in a 2-mum CMOS technology wi th poly-to-poly capacitors. The measured nonlinearity of this prototyp e is 0.03% for a 2.5 V input range, and the memory cell gain matching is 0.01% rms. The dynamic range of the memory exceeds 12 b for a sampl ing frequency of 700 MHz. The power dissipation for one channel operat ed from a single +5 V supply is 2 mW.