VALIDATION OF NUMERICAL-MODELS OF CERAMIC PIN GRID ARRAY PACKAGES

Thermal data for devices provided in manufacturers' data sheets are me asured under idealized conditions and are not adequate to predict accu rately junction temperature under other conditions. A validated model for the device, which can be employed in a variety of environments, is therefore required. This paper reports on the experimental and simula tion work carried out to validate the thermal models for 180 and 224 p in cavity up ceramic pin grid array packages. The thermal test apparat us provides repeatable thermal resistance measurements and the known b oundary conditions that are required for ease of simulation. (C) 1997 Elsevier Science Ltd.