A novel polysilicon depletion model for MOSFET devices is presented. I
t is shown that only simple modifications to standard analytical MOSFE
T models used for circuit simulations are required to account for the
polysilicon depletion effect. The accuracy of the model is validated b
y comparing results to both simulated and measured device characterist
ics. It is also shown that neglecting the polysilicon depletion effect
for devices with non-degenerate polysilicon gates may lead to non-phy
sical model parameter values and large errors in the calculated intrin
sic device capacitances.