A CMOS FLOATING-POINT VECTOR-ARITHMETIC UNIT

Citation
D. Timmermann et al., A CMOS FLOATING-POINT VECTOR-ARITHMETIC UNIT, IEEE journal of solid-state circuits, 29(5), 1994, pp. 634-639
Citations number
20
Categorie Soggetti
Engineering, Eletrical & Electronic
ISSN journal
00189200
Volume
29
Issue
5
Year of publication
1994
Pages
634 - 639
Database
ISI
SICI code
0018-9200(1994)29:5<634:ACFVU>2.0.ZU;2-3
Abstract
This work describes a floating-point arithmetic unit based on the CORD IC algorithm. The unit computes a full set of high level arithmetic an d elementary functions: multiplication, division, (co)sine, hyperbolic (co)sine, square root, natural logarithm, inverse (hyperbolic) tangen t, vector norm, and phase. The chip has been integrated in 1.6 mum dou ble-metal n-well CMOS technology and achieves a normalized peak perfor mance of 220 MFLOPS.