THE ROLE OF VELOCITY SATURATION IN THE SWITCHING DELAY OF AN R-C LOADED INVERTER

Exact analytical expressions for the switching delay of an inverter dr iving an RC load, taking into account the velocity saturation, are obt ained. Modified expressions to include the effect of source resistance are then presented. Owing to the limitation on switching current impo sed by the velocity saturation mechanism, the switching delay is subst antially increased for identical width-to-length ratios of the MOSFET in a complementary MOS logic circuit. Obviously, it is important to in crease the saturation velocity by miniband engineering or otherwise to improve the performance. However, it is found that the improvements i n the time delay are marginal after a saturation velocity of 2.4 x 10( 7) cm s-1 is reached. The effect of technologies aimed at circumventin g the hot-electron and other deleterious effects is a longer delay tim e of the circuit due to increased series resistance. However, the effe ct of increased series resistance is substantially damped due to veloc ity saturation. These results are particularly important in designing CMOS circuits with submicrometre MOSFET dimensions.