Sm. Mahmud et Lt. Samaratunga, MEMORY BANDWIDTH ANALYSIS OF HIERARCHICAL MULTIPROCESSORS USING MODELDECOMPOSITION AND STEADY-STATE FLOW-ANALYSIS, IEEE transactions on parallel and distributed systems, 5(5), 1994, pp. 553-560
Citations number
10
Categorie Soggetti
System Science","Engineering, Eletrical & Electronic","Computer Science Theory & Methods
For memory bandwidth analysis, most of the time the researchers [1]-[8
] discard the requests that are not accepted during a memory cycle. Su
ch an assumption simplifies the analysis and produces negligible discr
epancies from the actual results [3] for a system with a non-hierarchi
cal interconnection network. However, the assumption, ''the requests t
hat are not accepted during a memory cycle are discarded,'' cannot be
used for a multiprocessor system with a Hierarchical Interconnection N
etwork (HIN), because the error introduced due to such an assumption c
an be several orders of magnitude higher than the actual bandwidth! An
improved analytical model to determine the bandwidth of a HIN-based s
ystem is presented in this short note.