ESTIMATING IMPLEMENTATION BOUNDS FOR REAL-TIME DSP APPLICATION-SPECIFIC CIRCUITS

Citation
Jm. Rabaey et M. Potkonjak, ESTIMATING IMPLEMENTATION BOUNDS FOR REAL-TIME DSP APPLICATION-SPECIFIC CIRCUITS, IEEE transactions on computer-aided design of integrated circuits and systems, 13(6), 1994, pp. 669-683
Citations number
63
Categorie Soggetti
Computer Application, Chemistry & Engineering","Computer Science Hardware & Architecture
ISSN journal
02780070
Volume
13
Issue
6
Year of publication
1994
Pages
669 - 683
Database
ISI
SICI code
0278-0070(1994)13:6<669:EIBFRD>2.0.ZU;2-J
Abstract
This paper discusses techniques for estimating implementation bounds o n computational resources and their role in the high-level synthesis p rocess. Accurate estimations can be extremely useful in a multitude of synthesis operations, such as algorithm and architecture selection, d esign space search, module selection, transformations, allocation, ass ignment, and scheduling. Several techniques to efficiently estimate sh arp minimum and maximum bounds on the resource requirements of a hardw are implementation are discussed. The performance of the algorithms as well as their applications is analyzed using an extensive benchmark s et. The proposed techniques have been implemented in the HYPER synthes is system.