A MULTIPROCESSOR ARCHITECTURE FOR MULTIPLE PATH STACK SEQUENTIAL DECODERS

Citation
N. Belanger et al., A MULTIPROCESSOR ARCHITECTURE FOR MULTIPLE PATH STACK SEQUENTIAL DECODERS, IEEE transactions on communications, 42(2-4), 1994, pp. 951-957
Citations number
12
Categorie Soggetti
Telecommunications,"Engineering, Eletrical & Electronic
ISSN journal
00906778
Volume
42
Issue
2-4
Year of publication
1994
Part
2
Pages
951 - 957
Database
ISI
SICI code
0090-6778(1994)42:2-4<951:AMAFMP>2.0.ZU;2-G
Abstract
The Zigangirov-Jelinek (stack) algorithm allows decoding convolutional codes with a small computational effort compared to the optimum Viter bi algorithm. However, it suffers from a variability of that computati onal effort that is highly undesirable. This paper describes an archit ecture that implements a multiple-path-like stack algorithm for reduci ng this variability. This architecture is organized as a linear struct ure comprising special processors for extending tree nodes, called ext enders, and priority stacks for storing nodes in sorted metric order. The architecture is shown to have a good potential for reducing the co mputational variability without adding much overhead to the system. Si mulations have shown that this architecture effectively reduces comput ational variability as the number of processors increases, even for a relatively large number of extenders. Simulations run for up to 16 ext enders have also shown that using 4 to 16 extenders is a good choice. The architecture is also shown to reduce computational variability lik e the multiple path algorithm does, while having, a better time perfor mance.