The optimization of device series resistance in ultra-thin film SOI de
vices is studied through 2-D simulations and process experiments. The
series resistance is dependent on the contact resistivity of the silic
ide to silicon and the silicide geometry. To achieve low series resist
ance, very thin silicides that do not fully consume the SOI film are n
eeded. A novel cobalt salicidation technology using titanium/cobalt la
minates is used to demonstrate sub-0.2 mum, thin-film SOI devices with
excellent performance and very low device series resistance.