DEEP-SUBMICROMETER CHANNEL DESIGN IN SILICON-ON-INSULATOR (SOI) MOSFETS

Short-channel effects in deep-submicrometer SOI MOSFET's are explored over a wide range of device parameters using two-dimensional numerical simulations. To obtain reduced short-channel effects in SOI over bulk technologies, the silicon film thickness must be considerably smaller than the bulk junction depth because of an additional charge-sharing phenomenon through the SOI buried oxide. The optimal design space, con sidering nominal and short-channel threshold voltage, shows ample desi gn options for both fully and partially depleted devices, however, man ufacturing considerations in the 0.1 mum regime may favor partially de pleted devices.