A 12.5-NS 16-MB CMOS SRAM WITH COMMON-CENTROID-GEOMETRY-LAYOUT SENSE AMPLIFIERS

Authors
ISHIBASHI K KOMIYAJI K MORITA S AOTO T IKEDA S ASAYAMA K KOIKE A YAMANAKA T HASHIMOTO N IIDA H KOJIMA F MOTOHASHI K SASAKI K
Citation
K. Ishibashi et al., A 12.5-NS 16-MB CMOS SRAM WITH COMMON-CENTROID-GEOMETRY-LAYOUT SENSE AMPLIFIERS, IEICE transactions on electronics, E77C(5), 1994, pp. 741-748
Citations number
NO
Categorie Soggetti
Engineering, Eletrical & Electronic
Journal title
IEICE transactions on electronics → ACNP
ISSN journal
09168524
Volume
E77C
Issue
5
Year of publication
1994
Pages
741 - 748
Database
ISI
SICI code
0916-8524(1994)E77C:5<741:A11CSW>2.0.ZU;2-K
Abstract
A 16-Mb CMOS SRAM using 0.4-mum CMOS technology has been developed. Th is SRAM features common-centroid-geometry (CCG) layout sense amplifier s which shorten the access time by 2.4 ns. A flexible redundancy techn ique achieves high efficiency without any access penalty. A memory cel l with stacked capacitors is fabricated for high soft-error immunity. A 16-Mb SRAM with a chip size of 215 mm2 is fabricated and an address access time of 12.5 ns has been achieved.