A 16-MB FLASH EEPROM WITH A NEW SELF-DATA-REFRESH SCHEME FOR A SECTORERASE OPERATION

A 16-Mb flash EEPROM has been developed based on the 0.6-mum triple-we ll double-poly-si single-metal CMOS technology. A compact row decoder circuit for a negative gate biased erase operation has been designed t o obtain the sector erase operation. A self-data-refresh scheme has be en developed to overcome the drain-disturb problem for unselected sect or cells. A self-convergence method after erasure is applied in this d evice to overcome the overerase problem that causes read operation fai lure. Both the self-data-refresh operation and the self-convergence me thod are verified to be involved in the autoerase operation. Internal voltage generators independent of the external voltage supply and temp erature has been developed. The cell size is 2.0 mum x 1.7 mum, and th e die size has resulted in 7.7 mm x 17.32 mm.