A DELAY-LINE ON A VLSI GATE ARRAY AS A TIME DIGITIZER

Authors
GASPARINI F BRUGNERA R CARLIN R DALCORSO F DEGIORGI M DOSSELLI U GRASSI M MORANDIN M POSOCCO M STANCO L STROILI R
Citation
F. Gasparini et al., A DELAY-LINE ON A VLSI GATE ARRAY AS A TIME DIGITIZER, Nuclear instruments & methods in physics research. Section A, Accelerators, spectrometers, detectors and associated equipment, 342(2-3), 1994, pp. 571-577
Citations number
4
Categorie Soggetti
Nuclear Sciences & Tecnology","Physics, Particles & Fields","Instument & Instrumentation",Spectroscopy
Journal title
Nuclear instruments & methods in physics research. Section A, Accelerators, spectrometers, detectors and associated equipment → ACNP
ISSN journal
01689002
Volume
342
Issue
2-3
Year of publication
1994
Pages
571 - 577
Database
ISI
SICI code
0168-9002(1994)342:2-3<571:ADOAVG>2.0.ZU;2-D
Abstract
A delay line was developed on a VLSI gate array for drift time measure ments on muon chambers of the ZEUS detector at HERA. It consists of 80 cells featuring a 3 ns/cell propagation time; at the start a short pu lse is injected into the line and at the stop the status of the line i s latched into a 10 byte register. An r.m.s. resolution better than 1 ns was obtained with this reasonably low-cost TDC.