ACCELERATION OF SOFTWARE ALGORITHMS USING HARDWARE SOFTWARE CO-DESIGNTECHNIQUES/

Currently there is significant interest in the design and implementati on of embedded systems where the hardware and software subsystems are developed concurrently in order to meet design constraints. We present a development environment for general-purpose systems, where the obje ctive is to accelerate the performance of software-based applications, which are specified by C programs. Such programs may be partitioned i nto hardware and software subsystems - a speed-critical region of the software is implemented in an FPGA in order to provide the performance acceleration. We also discuss two versions of the underlying system h ardware architecture. Practical examples are given to illustrate our a pproach.