A NEW TESTING METHOD FOR EEPLA

Authors
RAJSUMAN R
Citation
R. Rajsuman, A NEW TESTING METHOD FOR EEPLA, IEEE transactions on computer-aided design of integrated circuits and systems, 13(7), 1994, pp. 935-939
Citations number
20
Categorie Soggetti
Computer Application, Chemistry & Engineering","Computer Science Hardware & Architecture
Journal title
IEEE transactions on computer-aided design of integrated circuits and systems → ACNP
ISSN journal
02780070
Volume
13
Issue
7
Year of publication
1994
Pages
935 - 939
Database
ISI
SICI code
0278-0070(1994)13:7<935:ANTMFE>2.0.ZU;2-O
Abstract
A testing method for EEPLA's is presented. The method requires small a mount of extra hardware and provides complete fault coverage. This met hod exploits the fact that each crosspoint can be reprogrammed in EEPL A. To our knowledge, this is the first algorithmic test method applica ble to EEPLA's. In the proposed approach, all single and multiple cros spoint faults, stuck-at faults, and bridging faults are detectable. Th e test set is simple and is easy to derive.