THE MODELING, CHARACTERIZATION, AND DESIGN OF MONOLITHIC INDUCTORS FOR SILICON RF ICS

The results of a comprehensive investigation into the characteristics and optimization of inductors fabricated with the top-level metal of a submicron silicon VLSI process are presented, A computer program whic h extracts a physics-based model of microstrip components that is suit able for circuit (SPICE) simulation has been used to evaluate the effe ct of variations in metallization, layout geometry, and substrate para meters upon monolithic inductor performance, Three-dimensional (3-D) n umerical simulations and experimental measurements of inductors were a lso used to benchmark the model accuracy, It is shown in this work tha t low inductor Q is primarily due to the restrictions imposed by the t hin interconnect metallization available in most very large scale inte gration (VLSI) technologies, and that computer optimization of the ind uctor layout can be used to achieve a 50% improvement in component Q-f actor over unoptimized designs.