This paper describes floating-point (FP) datapaths developed for graph
ics and simulation applications, The datapaths are fabricated using 0.
35-mu m CMOS technology and embedded in a 125-MHz, 291-MFLOPS vector p
ipelined processor for use in supercomputers, A new online test techni
que has been developed for the purpose of improving reliability under
actual operating conditions, The technique makes it easy to detect not
only static faults but also delay faults, which has traditionally bee
n difficult.