DEVELOPING LINEAR ERROR MODELS FOR ANALOG DEVICES

Techniques are presented for developing linear error models for analog and mixed-signal devices. A simulation program developed to understan d the modeling process is described, and results of simulations are pr esented. Methods for optimizing the size of empirical error models bas ed on simulated error analyses are included. Once established, the mod els can be used in a comprehensive approach for optimizing the testing of the subject devices. Models are developed using data from a group of 13-bit A/D converters and compared with the simulation results.