F. Balestra et al., PERFORMANCES AND PHYSICAL-MECHANISMS IN SUB-0.1 MU-M GATE LENGTH LDD MOSFETS AT LOW-TEMPERATURE, Journal de physique. IV, 4(C6), 1994, pp. 13-18
The electrical properties of sub-0.1 mum gate length LDD devices are i
nvestigated between room and liquid helium temperatures. The strong im
pact of gate overlapping effects on LDD resistance is shown for these
ultra-short channel MOSFETs in a wide temperature range. It is experim
entally demonstrated that these mechanisms lead to a substantial enhan
cement of the driving current when the devices are scaled down, and in
duce an additional improvement in the case of low temperature operatio
n. Furthermore, the performances of these transistors with LDD structu
re at low temperature are also discussed in terms of field assisted im
purity ionization in the LDD's.