Ea. Gutierrez et al., SERIES RESISTANCE EFFECTS IN SUBMICRON MOS-TRANSISTORS OPERATED FROM 300-K DOWN TO 4.2-K, Journal de physique. IV, 4(C6), 1994, pp. 31-36
In this paper low temperature electrical characterisation (LTEC) of su
bmicrOn MOS transistors is proposed as an optional tool to investigate
second-order effects. The LTEC allows to prove the link between the c
arrier multiplication at the source side and the series resistance eff
ects. This link cannot be distinguished when the MOS transistor is ope
rated at room temperature. This way one is able to do a further resear
ch on the series resistance effects and their impact on the extraction
of the electrical parameters of submicron MOS transistors.