THROTTLED-BUFFER ASYNCHRONOUS SWITCH FOR ATM

Asynchronous Transfer Mode (ATM) shared buffer switches have numerous advantages, but have the principal disadvantage that all switch traffi c must pass through the bottleneck of a single memory. To achieve the most efficient usage of this bottleneck, the shared buffer is made blo ckable, resulting in a switch architecture that we call ''throttled-bu ffer'', which has several advantageous properties. Shared buffer effic iency is maximized while decreasing both capacity and power requiremen ts. Asynchronous operation is possible, whereby peak fink data rates a re allowed to approach the aggregate switch rate. Multicasting is also efficiently supported. The architecture and operation of this low-cos t switch are described in detail.