EVALUATION OF EXCESS INDUCTANCE AND CAPACITANCE OF MICROSTRIP JUNCTIONS

Excess inductance and capacitance of various microstrip discontinuitie s (bends, impedance steps, and simple vias) are evaluated. For the ind uctance calculations, the structure is assumed to consist of perfectly conducting foils located in vacuum above a perfectly conducting groun d plane. For the capacitance calculations, the structure is assumed to be embedded in a multilayered dielectric medium. The surface-current distribution for the excess inductance calculation and the surface-cha rge distribution for the capacitance calculation are evaluated numeric ally, solving integral equations based on the boundary conditions. The reby, the conductor and dielectric surfaces are divided into a number of triangles, and the point-matching technique is used.