GAAS DCFL 2.5 GBPS 16-BIT MULTIPLEXER DEMULTIPLEXER LSIS

GaAs 2.5 Gbps 16 bit MUX/DEMUX LSI's have been successfully developed. DCFL is employed as a basic gate in order to reduce the power dissipa tion. To avoid the speed degradation caused by using DCFL, various tec hnologies such as 8 x 2(MUX)/2 x 8(DEMUX) data conversion processes, a Selector Merged Shift Register, clock overlapping, and a 0.7-mum BPLD D MESFET, have been introduced. Moreover the ECL I/O level interface a nd single power supply features make it easy to use MUX/DEMUX in optic al communication systems. The maximum operating data rate is 3.2 Gbps for both LSI's, and the power dissipation of chips which operates with 2.5 Gbps are as low as 1.3 W for each MUX/DEMUX.