OPTIMIZATION OF CHOPPER AMPLIFIERS FOR SPEED AND GAIN

This paper presents design techniques to optimize the performance of c hopper-stabilized ac-coupled CMOS inverter amplifiers. These amplifier s are used as comparators in high-speed flash analog-to-digital conver ters extensively [1]-[3]. For any given process technology, as the req uired conversion speed and resolution are increased, the amplifiers ar e required to increase their conversion speed and resolution, and to h ave higher switching speed as well as higher gain. Although these two requirements are in general contradictory, they can be optimized by pr oper design. In this paper, analytical expressions are derived which c an be used to optimize these amplifiers. The results obtained from the se analytical expressions and SPICE simulations agree well.