OPTIMIZATION OF BICMOS BUFFERS FOR LOW-VOLTAGE APPLICATIONS

Authors
ROUTLEY P BRUNNSCHWEILER A ASHBURN P
Citation
P. Routley et al., OPTIMIZATION OF BICMOS BUFFERS FOR LOW-VOLTAGE APPLICATIONS, Electronics Letters, 30(13), 1994, pp. 1046-1048
Citations number
7
Categorie Soggetti
Engineering, Eletrical & Electronic
Journal title
Electronics Letters → ACNP
ISSN journal
00135194
Volume
30
Issue
13
Year of publication
1994
Pages
1046 - 1048
Database
ISI
SICI code
0013-5194(1994)30:13<1046:OOBBFL>2.0.ZU;2-W
Abstract
The numerical optimisation of existing low voltage BiCMOS buffer desig ns allows a valid comparison of performance. A new bootstrap BiCMOS bu ffer design, which combines temporary saturation and a bootstrap capac itor, is shown to be the fastest under all conditions. The new design operates down to a supply voltage of 1.1V.