WARPAGE AND OXIDE PRECIPITATE DISTRIBUTIONS IN CZ SILICON-WAFERS

Several types of as-received and complementary metal oxide semiconduct or (CMOS) thermal simulated 100 mm wafers were used for warpage study under different annealing conditions. The results indicated that as-re ceived wafers showed little increase in warpage up to 1000-degrees-C f urnace temperature and 61.0 cm/min insertion rate. For the CMOS therma l simulation processed wafers, both the prior amount of oxygen precipi tation, DELTA[O(i)], where DELTA[O(i)] is the decrease in interstitial oxygen concentration, and bulk microdefect morphology affected warpag e. For DELTA[O(i)] less than ca. 26 ppma, wafers with predominantly oc tahedral precipitates without associated dislocations plus a low densi ty of small plate-type and dot-like precipitates underwent much less w arpage than wafers with predominantly large octahedral precipitates an d precipitate-dislocation-complexes (PDCs). When the DELTA[O(i)] was h igher than 26 ppma, the defects consisted of a high density of large o ctahedral-shaped precipitates and PDCs and thus warpage became inevita ble.