QUANTIZER NEURON CHIP (QNC) WITH MULTICHIP EXTENDIBLE ARCHITECTURE

This paper discusses a digital neuroprocessor named Quantizer Neuron C hip (QNC) employing the Quantizer Neuron model and two newly developed schemes; ''concurrent processing of quantizer neuron'' and ''removal of ineffective calculations''. QNC simulates neural networks named the Multi-Functional Layered Network (MFLN) with 64 output neurons, 4672 quantizer neurons and two million synaptic weights and can be used for character or image recognition and learning. The processing speed of the chip achieved 1.6 mu seconds per output neuron for recognition and 20 million connections updated per second (MCUPS) for learning. In ad dition, QNC can execute multichip operation for increasing the size of networks. We applied QNC to handwritten numeral recognition and reali zed high speed recognition and learning. QNC is implemented in a 1.2 m um double metal CMOS with sea of gates' technology and contains 27,000 gates on a 10.99 X 10.93 mm2 chip.