DYNAMIC PROBE SCHEDULING OPTIMIZATION FOR MCM SUBSTRATE TEST

We propose a improved integrated test generation/optimization algorith m for Multichip Module (MCM) substrate verification using two-probe te sters. The goal of this work is to reduce the substrate testing time w hile providing complete coverage for open, short, and high net resista nce faults. We approach this objective via two directions, namely test set size reduction and efficient probe scheduling. The test set size reduction is achieved by eliminating redundant tests associated with c onventional approaches. The probe scheduling problem is formulated as a dynamical multi-dimensional Traveling Salesman Problem for probe seq uence optimization. A simulated annealing based algorithm is devised t o simultaneously take these two factors into consideration during the integrated test generation/optimization process. Since there exist num erous test sets providing complete fault coverage for a given design, our algorithm dynamically selects preferred ones by invoking an effici ent validation routine during the test generation/optimization. Experi ments conducted on industrial substrates using a two-probe tester show ed that the test sets generated by our algorithm are able to reduce th e testing time by over 38% compared to those generated by an in-house patented package.